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stm32f030k6 problem with sysclk

Question asked by Taras Koval on Sep 12, 2017

part of code from CoIDE

//----------Clock configure-------------//
RCC->CFGR |= RCC_CFGR_PLLMULL4;          // PLL multiplication factor = 4
RCC->CR |= RCC_CR_PLLON; // PLL start
RCC->CFGR |= RCC_CFGR_SW_PLL;             // PLL as SYCLK


RCC->CFGR |= RCC_CFGR_MCO_PLL;

//or sysclk       //RCC->CFGR |= RCC_CFGR_MCO_SYSCLK;
RCC->CFGR |= RCC_CFGR_MCO_PRE_16;    //mco div 16

 

HSI=8Mhz

8MHz/2(prediv)*4(pllmull)=16MHz

... but frequency meter show 6Mhz on MCO!!! even when MCO_PRE_16.

6x16=96!!! Is it real sysclk=96MHz?

When MCO_PRE is equal 64 MCO freq is 1.5MHz-->and again sysclk=96MHz

...when i put HSI or HSE to MCO, all work good and MCO out shows real freq

 

Then i used timer...

 

//----------TIM14 configure-------------//
TIM14->PSC = 16000;
TIM14->ARR = 1000;
TIM14->CR1 |= TIM_CR1_CEN;
TIM14->DIER |= TIM_DIER_UIE;
NVIC_EnableIRQ(TIM14_IRQn);

 

... interrupt was calld 6 times per seconds)))

16000x1000=16M clock cycles

16Mx6Hz(interrupt)=96MHz!!!

 

Is it real, or where my mistake?

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