Clive One

Does HSEBYP work properly on the STM32L072CZ?

Discussion created by Clive One on Sep 5, 2017
Latest reply on Sep 21, 2017 by waclawek.jan

It is not mentioned in the errata, but the STM32L072CZ seems incapable of selecting a bypass (TCXO) source on the Murata LoRa module.

 

http://www.st.com/content/ccc/resource/technical/document/errata_sheet/group0/91/11/7e/67/de/8d/44/ad/DM00148855/files/D… 

 

With SB13 made on the LRWAN DISCO board the 32 MHz TCXO source is applied to HSE_IN.

 

Here if I use RCC_HSE_ON it can use that clock, with RCC_HSE_BYPASS it can not.

 

 // HSE requires solder bridge being made
void SystemClock_Config(void)
{
  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
  RCC_OscInitTypeDef RCC_OscInitStruct = {0};

 

  /* Enable HSE Oscillator and Activate PLL with HSE as source */
  RCC_OscInitStruct.OscillatorType      = RCC_OSCILLATORTYPE_HSE;
  RCC_OscInitStruct.HSEState            = RCC_HSE_ON; // 32 MHz TCXO, SB13 made, BYPASS not working, HSE_VALUE=32000000
  RCC_OscInitStruct.HSIState            = RCC_HSI_ON; // Leave ON
  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
  RCC_OscInitStruct.PLL.PLLState        = RCC_PLL_OFF;
  RCC_OscInitStruct.PLL.PLLSource       = RCC_PLLSOURCE_HSE;
  RCC_OscInitStruct.PLL.PLLMUL          = RCC_PLLMUL_6;
  RCC_OscInitStruct.PLL.PLLDIV          = RCC_PLLDIV_3;

 

  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
  {
    Error_Handler();
  }

 

  /* Set Voltage scale1 as MCU will run at 32MHz */
  __HAL_RCC_PWR_CLK_ENABLE();
  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); // 1,2,3

 

  /* Poll VOSF bit of in PWR_CSR. Wait until it is reset to 0 */
  while (__HAL_PWR_GET_FLAG(PWR_FLAG_VOS) != RESET) {};

 

  /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2
  clocks dividers */
  RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSE;
  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; // 1,2,4,8,16,64,128,256,512
  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; // 1,2,4,8,16
  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) // 0,1
  {
    Error_Handler();
  }
}

 

In fact if the HSEBYP bit is set, then HSERDY *never* goes high and we either get stuck in a loop, or bomb out into the Error_Handler()

 

The HSEBYP can only be set when HSEON is low, then setting HSEON high leaves us with HSERDY being low indefinitely. The HSE_OUT pin is not connected to anything, so the TCXO is the sole source of the clock, and I can definitely clock the part from the HSE 32MHz so it is physically present and viable.

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