AnsweredAssumed Answered

Unknown STLink JTAG/SWD mode?

Question asked by Mikas Longbardi on Aug 24, 2017

In STLink settings menu we can chose JTAG or SWD but which JTAG and SWD mode is it?

 

Full SWJ (JTAG-DP + SW-DP) - Reset State

Full SWJ (JTAG-DP + SW-DP) but without NJTRST

JTAG-DP Disabled and SW-DP Enabled

 

Trying to figure out why MODER change from ALT to GEN dont work, whether it's the host who didnt send the right JTAG sequence (required for F4) or if there is bugs in F446 JTAG/SWD interface (one mentioned in errata).

 

Is it normal for a device under default JTAG-DP + SW-DP in which SWD is used that a logic low on PA15 JTDI

will cause system halt or similarly?

 

As mentioned last in link below that does not work, GPIO are stuck in ALT mode which confirms RM00090:

>>When debug pins (JTAG or SW or TRACE) are mapped, changing the corresponding IO pin configuration in the IOPORT controller has no effect.

 

https://community.st.com/thread/36718-stm32f3-specifics-of-using-dbg-pins-for-gpio

Outcomes