Any reason not to drive 6 L6472 daisy chained devices directly from the STM32F303 SPI bus? Running at ~1MHz.
Hi D S ,
Daisy chain topology is based on set of shift registers connected at series with common clock signal.
As the Rx an Tx SPI shift registers are physically separated at STM32 devices this is impossible to perform a continuous transaction of data as the chain is disconnected at each slave in fact.
On the other side, transaction of data at this structure is possible if data frames are well separated and master gives sufficient time between the frames to all the slaves in the chain for proper software reaction. Each slave has to read lastly received data and store it into the TxDR before next frame transaction starts.
This software action is necessary to assure all data to be transacted between slaves in the chain properly.
I hope it is clear.
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