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Backup SRAM write failure (STM32F446)

Question asked by SeK on Jun 22, 2017
Latest reply on Jun 23, 2017 by SeK

Hello.

 

I have an issue using the backup SRAM on a STM32F446.

 

The backup SRAM is used to store calibration data  which must be retained in case of a power fail reset. For that I connected the VBAT pin to a capacitor which is charged from VDD through a diode and can power VBAT for about 15 seconds when VDD is not present.

Because the calibration data must always be read accessable, peripheral clock is enabled setting the BKPSRAMEN bit in the RCC_AHB1ENR register just after startup.

 

The write of the calibration data into the SRAM is done after first startup. For that subroutines accessing the data call this routine

 

void bak_write_enable()

{

  RCC->APB1ENR |= RCC_APB1ENR_PWREN;

  PWR->CR |= PWR_CR_DBP;

}

 

to disable the SRAM write protection before writing the SRAM.

 

Furthermore the backup regulator will be enabled in normal operation (setting the BRE bit in PWR_CSR) to retain data in VBAT mode. Except when the debugger is running and I want to verify if the calibration routines are working correctly. And here rises my problem:

 

The reference manual says that the backup regulator must not be enabled to use the backup SRAM. But I trapped into a situation where the write access to backup SRAM fails when the regulator is off. Running this code

 

bak_write_enable();

...

backup_sram_var1 = xxx;

backup_sram_var2 = xxx;

backup_sram_var3 = xxx;

....

bak_write_disable();

 

I could figure out, that setting the value of backup sram data sometimes fails, when the regulator is off. Enabling it all works fine.

 

Any ideas? Thanks a lot.

 

Sebastian

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