AnsweredAssumed Answered

STM32F746 USB OTG clock value??

Question asked by chris250 on Jun 16, 2017



The Problem

I am running uCLinux on the STM32F746. I am using a gadgetfs-based mass storage device with the SD card for a backing file. The USB PHY is an external SMSC ULPI chip. This works fine when connected to most computers, but on some computers it produces errors.

Using a LeCroy Mercury T2 USB bus analyser, I have found that in some cases there are CRC errors in the USB packets.

When the failed LeCroy USB traces are compared working USB traces, I can see that:

  • both the failed and the good USB packets have the same calculated CRC value
  • the data within the failed USB packet has a couple of bits filpped, which is causing the CRC check error

I can replicate this issue on 2 different STM32F746 hardware platforms (with different SMSC USB PHYs), with a variety of cables (some with spec compliant labels), when plugged into some different computers/hubs (high end Dell laptop, hub in a monitor).


The Question!

uCLinux sets the PLL48CLK as 50MHz. This is outside the spec stated in the reference manual (48MHz +-0.25%). However the ref manual says that the PLL48CLK is only used for Full Speed OTG USB.

Is that the case??? Or is the PLL48CLK also used for High Speed USB through the ULPI interface?

Also... any other thoughts are welcome