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How does UART error handling work when using DMA?

Question asked by diez.r on Jun 1, 2017

Hi all:

 

I wonder how UART error handling works when using DMA on an STM32F4xx, although I do use STM32F0xx microcontrollers too.

 

If a parity or frame error pops up, what is the best way to handle it? I guess you cannot tell which byte caused the parity error or where the frame error was located, in order to try and drop just the affected packets in the DMA receive buffer.

 

I suspect DMA carries on after such a UART error anyway. However, I did hit an interesting problem. During start-up, the rx line toggles randomly for a short while, so I had to clear the ORE flag (overrun) on the UART or the DMA channel wouldn't start. Which also raises the question whether there is still a small window of opportunity before clearing ORE and starting DMA.

 

Clearing ORE is done with the software sequence "a read to the USART_SR register followed by a read to the USART_DR register". I wouldn't expect that DMA performs such a sequence between bytes. If there is a UART "noise detected" or "frame error" in the middle of a DMA transfer, will that stop the DMA transfer altogether? Or will all bytes afterwards be corrupt? I am using a DMA circular buffer, so that would be fatal.

 

I couldn't find any good explanation in the reference manual, and I had no lock on the Internet. I hope someone here can help.

 

Many thanks in advance,

  rdiez

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