I am trying to reduce the HCLK frequency down to 8MHz or less on an STM32F405 MCU.
Using STM32CubeMX, when I configure an HCLK clock lower than 30MHz with the clock configuration tool, the box with the HCLK frequency number becomes red and the following error is indicated:
"AHB clock frequency must be >= 30 MHz and <= 168MHz"
This happens with or without the PLL.
However, looking at the documentation I do not see this limitation. There is only one which is specified:
"When the Ethernet is used, the AHB clock frequency must be at least 25 MHz."
But in my case I do not use the Ethernet (not available for the STM32F405), and hence I should be able to go down to 8MHz for the HCLK in my opinion.
Can anybody tell me if this is an error of the clock configuration tool, or if this is a real limitation of the MCU (and where this is indicated)?