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stm32f7xxx memory card - TCM.

Question asked by avi_crak.videocrak on May 14, 2017
Latest reply on May 15, 2017 by Nesrine M

The description of the stm32f746bg series has lines:
and L1-cache: 4KB data cache and 4KB instruction cache
SRAM: 320KB (including 64KB of data TCM RAM for critical real-time data) + 16KB of instruction TCM RAM (for critical real-time routines) + 4KB of backup SRAM (available in the lowest power modes).

 

But there is no exact determination about possible overlapping of addresses.
The first question - L1-cache is a part of a kernel? It isn't a part available memories? I want to use 64KB+16KB of data TCM RAM without problems of the conflict with L1-cache.

 

Second question. Address DTCM-RAM 0x20000000 + 64 Kbytes, and ITCM-RAM 0x0 + 16 Kbytes. The address space of memory from 0x20000000 turns out the linear. For an acceleration of data I just need to declare sections in duplicate: the first set of sections - fast memory, the second - a standard set of sections. If data for the first set appear less than the extent of fast memory - that the standard set will have the partial acceleration. I already checked it, works.
But there was ITCM-RAM use problem.
I want to transfer the table of vectors to fast memory. Where it is possible to execute copying?

 

Third question.
In case of switching on of the microprocessor there is the hardware reading two 32b words - 1 address of a stack (_estack), the 2nd address of function of reset (Reset_Handler). Filling of the register with the address of a stack - harmless operation. Before the first interruption it is possible to change this address as will take in head.
But function of reset has unique value. I can't assign directly the address from the ITCM-RAM area, there during cold start is empty.
Means to me it is necessary to execute copying of data, a program code, and the table of vectors. And after to execute change of field of loading through structure of SCB.
There is a problem. How to explain to a work environment of GCC - that the residential address changes?
I can execute compilation and assembly of the project with different conditions 2 times. But it is difficult and a little effective. I want that it worked.

 

I looked for examples of use of TCM-RAM. But nothing good was succeeded to find.

 

I can print in Russian, so there are less losses.

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