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SPC560D40x - Interrupt Duration

Question asked by Binbin Zhang on May 3, 2017
Latest reply on Sep 20, 2017 by raghu tumati

Hi ST expert,

 

I am trying to use SPC5 as a multi-channel PWM controller. Normally for this kind of application, the duty cycle calculation will be done in an interrupt. For 100kHz PWM, the allowed interrupt duration is <10uS, for example 8uS max. The rest of time (10uS-8uS=2uS) should be reserved for other processes, such as communication etc.

 

As there is a lot calculation for multi-channel PWM, it is necessary to maximize the usage of the interrupt duration. However, I found it will take >1.2uS to enter an interrupt and take another 1uS to go back to the main routine for 48MHz clock. That means >40% of the interrupt duration will be wasted. Attached is my program used to test the interrupt duration and the captured waveform - PIT Channel 1 as the trigger source; PC9 is the output.

 

My question here is why SPC5 needs so many clocks to enter and left the interrupt and is there any way to reduce such unnecessary timing?

 

Thank you!

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