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STM32F407

Question asked by NEERAJ GUPTA on Apr 13, 2017
Latest reply on Apr 13, 2017 by Clive One

Dear Sir,

               I m using timer1 of STM32F407 to get Edge-aligned PWM & using the following settings to give 84 MHz clock to timer1 :

RCC->PLLCFGR &= ~(0x1F); //PLLM=0    
 RCC->PLLCFGR |= 0x08; //PLLM=8
 RCC->PLLCFGR &= ~(0x7FC0); //PLLN=0    
 RCC->PLLCFGR |= (84)<<6; //PLLN=84
 RCC->PLLCFGR |= 0x010000; //PLLP=4
 RCC->PLLCFGR |=(4)<<24; //PLLQ=4    
 RCC->CR |= RCC_CR_PLLON;     
 while((RCC->CR & RCC_CR_PLLRDY)==0); //stay here if PLL not ready    
 RCC->CFGR |= 0x0000002; // PLL selected as system clock

Basic steps followed:

1. HSI internal (16 MHz) is chosen as oscillator.

2. PLLM is set to 8.

3. PLLN is set to 84.

4. PLLP is set to 4.

5. PLL is switched ON.

6. PLL is checked whether it is locked properly.

7. System clock input source MUX selects  PLL as input.

8. PPRE2;PPRE1;HPRE in RCC_CFGR register are left to their default values.

 

As per my application, i need PWM frequency more than 16 MHz. Which i m not getting even after entering these settings.  Even this 16 MHz PWM is not stable enough. Please! provide the required correction.

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