I have some SDMMC driver code carried over from STM32F4xx that uses bit 9 STBITERR of SDMMC_STA register. In the STM32F7xx reference manual RM0410 DM00224583 DocID028270 Rev 2 dated April 2016, this bit in SDMMC_STA register is described as "Reserved, must be kept at reset value." whereas the STM32F4xx RM0090 describes this bit as "STBITERR: Start bit not detected on all data signals in wide bus mode" in register SDIO_STA. Similarly for the SDMMC_ICR and SDMMC_MASK registers (reserved, keep at reset value).
This bit seems to be doing something real, normally I return an error code on this condition, but if I don't test for it(since this bit doesn't exist in the F7) in my driver hangs. If I test for it but give normal return code, everything SEEMS to work fine.
What does this bit do in the F7?