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I2S with DMA 24 bit in 32 bit frame

Question asked by mtd52237 on Apr 5, 2017
Latest reply on Apr 5, 2017 by waclawek.jan

I'm using the STM32F4 with a 24 bit ADC that uses I2S 24 bit in 32 bit frame. I'm using the DMA to transfer the samples to memory, but I'm kind of confused on how the data is stored. Is the data stored like this? L = left channel bit, R = right channel bit. 

 

[L][L][L][L][L][L][L][L][L][L][L][L][L][L][L][L] = Packet 1

[L][L][L][L][L][L][L][L][0][0][0][0][0][0][0][0] = Packet 2

[R][R][R][R][R][R][R][R][R][R][R][R][R][R][R][R] = Packet 3

[R][R][R][R][R][R][R][R][0][0][0][0][0][0][0][0]  = Packet 4

 

Or is the data stored like this:

[L][L][L][L][L][L][L][L][L][L][L][L][L][L][L][L] = Packet 1

[L][L][L][L][L][L][L][L][R][R][R][R][R][R][R][R] = Packet 2

[R][R][R][R][R][R][R][R][R][R][R][R][R][R][R][R] = Packet 3 

 

Both could be wrong... I've had a lot of problems finding documentation about the specifics of DMA transfers and the format of I2S data in a buffer. I'm using the HAL_I2S_RECEIVE_DMA() function to receive the data. 

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