CRC unit is reset by writing CRC_CR.RESET to 1.
If immediately after this data are written into CRC_DR by the processor (i.e. the two writes are in consecutive str instructions), the written data are ignored and CRC_DR reads 0xFFFFFFFF.
Apparently, the guard time promised for DR writes does not apply to this sequence, and the CRC reset takes some time, so that DR writes within a certain number of cycles from CR writes are ignored.
ST, please specify exactly this time.