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The problem with ethernet on STM32F407

Question asked by kashuba.dmitry on Apr 6, 2017
Latest reply on Apr 19, 2017 by kashuba.dmitry

Hi all!

I want to study the ethernet on STM32F407!

I have the working board with lan8720, stm32f407 and LED

I connected this board to PC through Ethernet cable/

First, I want to know,,that frames from PC are written to RX FIFO of the MAC of the STM32F407 and the register MACDBGR is analized

I wrote the following code:

 

/*******/
#include "stm32f4xx.h"

// pa1-refclk, pa2-mdio,pa7-crs;
// pb11-txen, pb12-tx0, pb13-tx1,pb14-rxer;
// pc1-mdc,pc4-rx0, pc5-rx1,
// pe12-rst
// pd8-hl3_r

/******/

uint8_t temp,temp1;
uint32_t i, j,temp2,temp3;

//main program
int main()
{
//set PLL 64MHz
RCC->PLLCFGR=0x24000000;
RCC->PLLCFGR|= RCC_PLLCFGR_PLLSRC_HSI;//hsi-pll sourc
RCC->PLLCFGR|=RCC_PLLCFGR_PLLM_4;//M=16
RCC->PLLCFGR|=RCC_PLLCFGR_PLLN_7;//N=128
RCC->PLLCFGR&=~RCC_PLLCFGR_PLLP;//P=2

RCC->CR|=RCC_CR_PLLON;//enab pll
while (!(RCC->CR&RCC_CR_PLLRDY));

RCC->CFGR=RCC_CFGR_PPRE2_2|RCC_CFGR_PPRE1_2;
RCC->CFGR|=RCC_CFGR_SW_PLL;//sys clock-pll

FLASH->ACR|=FLASH_ACR_LATENCY_4WS;
for (i=0;i<500;i++);

//set rcc

RCC->AHB1ENR|=RCC_AHB1ENR_GPIOAEN|RCC_AHB1ENR_GPIOBEN| RCC_AHB1ENR_GPIOCEN|RCC_AHB1ENR_GPIODEN|RCC_AHB1EN R_GPIOEEN;
RCC->AHB1ENR|=RCC_AHB1ENR_ETHMACRXEN|RCC_AHB1ENR_ETHMA CTXEN|RCC_AHB1ENR_ETHMACEN;
RCC->APB2ENR|=RCC_APB2ENR_SYSCFGEN;
SYSCFG->PMC=SYSCFG_PMC_MII_RMII_SEL;

//set gpio

GPIOA->MODER|=GPIO_MODER_MODER7_1|GPIO_MODER_MODER2_1|GP IO_MODER_MODER1_1;
GPIOB->MODER|=GPIO_MODER_MODER13_1|GPIO_MODER_MODER12_1| GPIO_MODER_MODER11_1;
GPIOC->MODER|=GPIO_MODER_MODER5_1|GPIO_MODER_MODER4_1|GP IO_MODER_MODER1_1;
GPIOD->MODER|=GPIO_MODER_MODER8_0;//pin 8-0utput
GPIOE->MODER|=GPIO_MODER_MODER12_0;//pin 12-0utput

GPIOA->OSPEEDR|=GPIO_OSPEEDER_OSPEEDR7|GPIO_OSPEEDER_OSP EEDR2|GPIO_OSPEEDER_OSPEEDR1;
GPIOB->OSPEEDR|=GPIO_OSPEEDER_OSPEEDR14|GPIO_OSPEEDER_OS PEEDR13|GPIO_OSPEEDER_OSPEEDR12|GPIO_OSPEEDER_OSPE EDR11;
GPIOC->OSPEEDR|=GPIO_OSPEEDER_OSPEEDR5|GPIO_OSPEEDER_OSP EEDR4|GPIO_OSPEEDER_OSPEEDR1;

GPIOA->AFR[0]|=0xB0000BB0;//mac
GPIOB->AFR[1]|=0x00BBB000;//mac
GPIOC->AFR[0]|=0x00BB00B0;//mac

//config LAN8720

GPIOE->ODR=GPIO_ODR_ODR_12;//rst=1
while (ETH->MACMIIAR&0x00000001);//busy=1

ETH->MACMIIDR=0x00001000;//auto-negotiation
ETH->MACMIIAR=0x00000803;//adr=1, reg=0,write
while (ETH->MACMIIAR&0x00000001);
for (i=0;i<50000;i++)
{
ETH->MACMIIAR=0x00000fc1;//adr=1, reg=31,read
while (ETH->MACMIIAR&0x00000001);
while (!(ETH->MACMIIDR&0x00001000))//auto-neg done?
{//no
GPIOD->ODR&=~GPIO_ODR_ODR_8;
ETH->MACMIIAR=0x00000fc1;//adr=1, reg=31,read
while (ETH->MACMIIAR&0x00000001);
}
GPIOD->ODR|=GPIO_ODR_ODR_8;

}
for (i=0;i<50000;i++);
GPIOD->ODR&=~GPIO_ODR_ODR_8;
for (i=0;i<5000000;i++);

//config MAC

ETH->MACCR=0x00008000;//

switch(ETH->MACMIIDR)
{
case 0x00001044:ETH->MACCR|=0x00008000;//10,h
break;
case 0x00001054:ETH->MACCR|=0x00008800;//10,f
break;
case 0x00001048:ETH->MACCR|=0x0000c000;//100,h
break;
case 0x00001058:ETH->MACCR|=0x0000c800;//100,f
GPIOD->ODR|=GPIO_ODR_ODR_8;
for (i=0;i<500000;i++);
GPIOD->ODR&=~GPIO_ODR_ODR_8;
for (i=0;i<5000000;i++);
break;
default: GPIOD->ODR|=GPIO_ODR_ODR_8;
while (1);
break;
}
ETH->MACCR|=ETH_MACCR_RE;//enable receive
ETH->MACFFR=ETH_MACFFR_RA;//all frames receive

while (!(ETH->MACDBGR&0x0000ffff))
{
GPIOD->ODR|=GPIO_ODR_ODR_8;
}
while(1)
{
GPIOD->ODR|=GPIO_ODR_ODR_8;
for (i=0;i<500000;i++);
GPIOD->ODR&=~GPIO_ODR_ODR_8;
for (i=0;i<500000;i++);
}
}

The problem is, that no bit with numbers from 0 to 15 in register MACDBGR is set 1.

But the PLL is working, the frerquiency of the CPU clock is 64 MHz. Lan8720 is configured, it indicates that the speed of the ethernet is 100 Mbps and the mode is full-duplex.

 

Where do I mistake in the code?

Thank You!

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