The datasheet for STM32F765xx, STM32F767xx, STM32F768Ax, STM32F769xx says on page 26 "The maximum frequency of the two AHB buses is 216 MHz while the maximum frequency of the high-speed APB domains is 108 MHz. The maximum allowed frequency of the low-speed APB domain is 54 MHz."
Table 17 at page 116 repeats these same numbers.
However, the reference manual for STM32F76xxx and STM32F77xxx says at page 166 that APB1 may not exceed 45MHz, and APB2 may not exceed 90MHz.
Which of these two is correct?