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STM32F4 ADC - speed vs resolution

Question asked by campbell.alan on Jan 20, 2012
Latest reply on Jan 23, 2012 by Clive One
I've seen figures quoting speeds of over 7.2 MSample/sec, when using triple ADC a 36MHz ADClock, and DMA. However, at those speeds (by my calculations) the effect of RADC on the input sample circuit means you lose about 7 bits of accuracy. Stretching the sample period from 3 up 6 clock cycles still only gives 10-bit resolution. Is that right?

My target is a Software Defined Radio (SDR) and the higher the sample rate the better. Has anyone got a circuit where a fast ADC simply pumps data into a GPIO port? Considering the ADC limitations, should I be looking at another controller altogether?