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STM32F407, DMA2 IRQ versus TIM3 IRQ, TIM3 wins!

Question asked by de_simone.francesco on Mar 9, 2017
Latest reply on Mar 10, 2017 by de_simone.francesco

Hi to all,

I am developing a graphic driver that handle 2 LCD over the SPI1 port and different CS lines. I setup a frame renderer tat renders 128 scanlines made of 160 pixels. A frame rendering can be launched by the TIM3 IRQ set to a frequency of 25Hz.

Every scanline is rendered and then passed to the DMA that drives the SPI. In this way the engine sends the scanline to the LCD while rendering the next line. Of course I have set a double buffering system to prevent a conflict while accessing to buffers.

Now, when there is graphics on one LCD only no problems. but when both LCD need to show graphics the DMA should transfer one scanline to one LCD and after that select the second and transfer the other scanline.

In order to do that I thought to take advantage of the Transfer complete interrupt, and switch the CS lines of the LCD. Now problems come. The TC interrupt occurs only after the frame renderer interrupt. 

Let's say that one frame is called every 40ms, the TC of the DMA is fired every 40ms, while it's evident that the transfer takes much less. I tried to change the NVIC settings to change the priorities but no luck. TIM3 always wins versus the DMA. so only one display is refreshed.


If I set the Systick IRQ to count milliceconds and trig the frame rendering everything works perfectly, the TC of the DMA is called perfectly and the two scanlines are sent to the LCDs while the engine renders scanlines to the buffers.

Is there something I am missing?

Both display driven by the Systick, DMA, SPI: