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How to clear frozen debug mode DBF bit using stm32L476 and HAL_CAN level drivers?

Question asked by Eugenia Suarez on Feb 27, 2017
Latest reply on Feb 28, 2017 by Eugenia Suarez

Hi, 

I'm trying to work via CAN bus and checking a simple  data transmision without using interruptions. I'm using stm32L476 mcu and HAL level drivers for discovery kit. I think all can configuration operations has correctly done looking to my var values during debug mode. But now I would like to unfreeze TX/RX CAN module for debugging.

 

The case is that I'm not able to clear the 16th bit (DBF) of MCR register. Actually I can't access any of the bits of this register since I'm watching this register but my instances does not have effect over it. 

 

Some define for CAN debug purposes:

 

/* DBF bit mask for unfrozen bus can during debug */

 

//since this bit position is not defined in hal header,  I have created this one in my higher level h source

 

#define CAN_MCR_DBF_Pos (16U)
#define CAN_MCR_DBF_Msk (0x0U << CAN_MCR_DBF_Pos) /*16 b */
#define CAN_MCR_DBF CAN_MCR_DBF_Msk

 

This is my init code: 

 

void App_Task_CAN_init(void)
{

static CanTxMsgTypeDef TxMessage;
static CanRxMsgTypeDef RxMessage;

/*configuracion timing para obtener 500kb/s*/

 

HCAN_Struct.Instance = CAN1;
HCAN_Struct.Instance->MCR &=(uint32_t)CAN_MCR_DBF;  //unfreeze can - debug bit --> dbf=0
HCAN_Struct.pTxMsg = &TxMessage;
HCAN_Struct.pRxMsg = &RxMessage;
HCAN_Struct.Init.Prescaler = 1;
HCAN_Struct.Init.Mode = CAN_MODE_NORMAL;
HCAN_Struct.Init.SJW = CAN_SJW_1TQ;
HCAN_Struct.Init.BS1 = CAN_BS1_6TQ;//segment point at 87.5%
HCAN_Struct.Init.BS2 = CAN_BS2_1TQ;
HCAN_Struct.Init.TTCM = DISABLE;
HCAN_Struct.Init.ABOM = DISABLE;
HCAN_Struct.Init.AWUM = DISABLE;
HCAN_Struct.Init.NART = DISABLE;
HCAN_Struct.Init.RFLM = DISABLE;//Fifo locked mode disabled
HCAN_Struct.Init.TXFP = DISABLE;//prioridad de tx por id (más bajo más prioridad)

if (HAL_CAN_Init(&HCAN_Struct) != HAL_OK)
{
TaskCan_Error_Handler();
}

 

}

 

HAL structure provided by HAL level drivers:

 

typedef struct
{
   CAN_TypeDef *Instance; /*!< Register base address */

   CAN_InitTypeDef Init; /*!< CAN required parameters */

   CanTxMsgTypeDef* pTxMsg; /*!< Pointer to transmit structure */

   CanRxMsgTypeDef* pRxMsg; /*!< Pointer to reception structure */

   __IO HAL_CAN_StateTypeDef State; /*!< CAN communication state */

   HAL_LockTypeDef Lock; /*!< CAN locking object */

   __IO uint32_t ErrorCode; /*!< CAN Error code */

}CAN_HandleTypeDef;

 

typedef struct
{
   __IO uint32_t MCR; /*!< CAN master control register, Address offset: 0x00 */
   __IO uint32_t MSR; /*!< CAN master status register, Address offset: 0x04 */
   __IO uint32_t TSR; /*!< CAN transmit status register, Address offset: 0x08 */
   __IO uint32_t RF0R; /*!< CAN receive FIFO 0 register, Address offset: 0x0C */
   __IO uint32_t RF1R; /*!< CAN receive FIFO 1 register, Address offset: 0x10 */
   __IO uint32_t IER; /*!< CAN interrupt enable register, Address offset: 0x14 */
   __IO uint32_t ESR; /*!< CAN error status register, Address offset: 0x18 */
   __IO uint32_t BTR; /*!< CAN bit timing register, Address offset: 0x1C */
      uint32_t RESERVED0[88]; /*!< Reserved, 0x020 - 0x17F */
   CAN_TxMailBox_TypeDef sTxMailBox[3]; /*!< CAN Tx MailBox, Address offset: 0x180 - 0x1AC */
   CAN_FIFOMailBox_TypeDef sFIFOMailBox[2]; /*!< CAN FIFO MailBox, Address offset: 0x1B0 - 0x1CC */
   uint32_t RESERVED1[12]; /*!< Reserved, 0x1D0 - 0x1FF */
     __IO uint32_t FMR; /*!< CAN filter master register, Address offset: 0x200 */
   __IO uint32_t FM1R; /*!< CAN filter mode register, Address offset: 0x204 */
      uint32_t RESERVED2; /*!< Reserved, 0x208 */
   __IO uint32_t FS1R; /*!< CAN filter scale register, Address offset: 0x20C */
   uint32_t RESERVED3; /*!< Reserved, 0x210 */
   __IO uint32_t FFA1R; /*!< CAN filter FIFO assignment register, Address offset: 0x214 */
      uint32_t RESERVED4; /*!< Reserved, 0x218 */
   __IO uint32_t FA1R; /*!< CAN filter activation register, Address offset: 0x21C */
   uint32_t RESERVED5[8]; /*!< Reserved, 0x220-0x23F */
   CAN_FilterRegister_TypeDef sFilterRegister[28]; /*!< CAN Filter Register, Address offset: 0x240-0x31C */
} CAN_TypeDef;

I'm debugging with keil ide, but when debugger pass through MCR instance field (instance is the declared HAL structure for init function) no bit has changed. You can seee how there is the reset value. I put breakpoint at the assignation statement and two steps after stop there, this is the image:

 

what I see when I watch MCR register value and thread has just passed the assignation sentence.

 

How would you do in order to access and write some bit of MCR in this case?

If some one has seen something wrong in my proposal, please, let me know. 

 

Thanks in advance.

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