Since the Wish List seems to be closed, I'll put this request here.
To the processor designers:
The DMA transfer count is a 16 bit value that can be in the range 1-65535. Since 0 is a useless value and 65536 would be a useful value, could you change the hardware so that we can specify the count to be 1-65536?
You see, program FLASH on the 407 is 1MB, or 256K words. If I could specify a count of 65536, I could CRC all of program FLASH in exactly 4 transfers.
But since the maximum is 65535, I have to either do 5 weird sized DMAs to the CRC unit, or go for 8 transfers of 32768 words each.
Just a thought.
Andrei from The Great White North
as seen on the Embedded.FM embedded systems podcast and blog.