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Power controller questions on STM32F401RE

Question asked by Dimitris Paraskevopoulos on Feb 25, 2017
Latest reply on Mar 2, 2017 by Khouloud G

Related reference manual RM0368… 


Related datasheet… 

I have a couple of questions about the power controller


Page 74 Section 5.2.1 Figure 8

According to the text


"The device remains in Reset mode when VDD/VDDA is below a specified threshold, VPOR/PDR"


So either the diagram is wrong or Reset line is using negative logic (1 is low and 0 is high). Can someone confirm which is the correct statement?



Brown out detection seems to perform the exact same thing as the power on reset. Why is there a need for both of them?


Thank you very much for your time.


With kind regards,