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Bare minimum register settings for SPI on STM32F103

Question asked by Fleming.Keith on Feb 23, 2017
Latest reply on Feb 24, 2017 by waclawek.jan

Hello,

 

I have need to bring up SPI1 (PA4,PC5,PC6,PC7) on an STM32F103 in master mode using the least code possible. I have a function that (is supposed to) initialize the SPI. I am using the bit-band region to manipulate bits atomically. It is divided into three sections:

RCC (Enable SPI1 and reset device)
GPIO (Set MOSI/SCK to Output_ALT_PP and MISO to INPUT)
SPI (Master, 8-bit, MSB-first, divide-by-256, etc)

 

void InitializeSPI () {
*((volatile long *)(0x42000000 + (0x40021018 - 0x40000000)*32 + 12*4)) = 1; // RCC_APB2ENR.SPI1EN p.112
*((volatile long *)(0x42000000 + (0x4002100c - 0x40000000)*32 + 12*4)) = 1; // RCC_APB2RSTR.SPI1RST p.106
*((volatile long *)(0x42000000 + (0x4002100c - 0x40000000)*32 + 12*4)) = 0; // RCC_APB2RSTR.SPI1RST p.106
SetMode (PA5, OUTPUT_ALT_PUSHPULL | MODE_OUTPUT_50MHZ); // p.166
SetMode (PA6, INPUT_FLOAT | MODE_INPUT); // p.166
SetMode (PA7, OUTPUT_ALT_PUSHPULL | MODE_OUTPUT_50MHZ); // p.166
*((volatile long *)(0x42000000 + (0x40013000 - 0x40000000)*32 + 15*4)) = 0; // SPI1_CR1.BIDIMODE p.745
*((volatile long *)(0x42000000 + (0x40013000 - 0x40000000)*32 + 14*4)) = 0; // SPI1_CR1.BIDIOE p.745
*((volatile long *)(0x42000000 + (0x40013000 - 0x40000000)*32 + 13*4)) = 0; // SPI1_CR1.CRCEN p.745
*((volatile long *)(0x42000000 + (0x40013000 - 0x40000000)*32 + 12*4)) = 0; // SPI1_CR1.CRCNEXT p.745
*((volatile long *)(0x42000000 + (0x40013000 - 0x40000000)*32 + 11*4)) = 0; // SPI1_CR1.DFF p.745
*((volatile long *)(0x42000000 + (0x40013000 - 0x40000000)*32 + 10*4)) = 0; // SPI1_CR1.RXONLY p.746
*((volatile long *)(0x42000000 + (0x40013000 - 0x40000000)*32 + 9*4)) = 0; // SPI1_CR1.SSM p.746
*((volatile long *)(0x42000000 + (0x40013000 - 0x40000000)*32 + 8*4)) = 0; // SPI1_CR1.SSI p.746
*((volatile long *)(0x42000000 + (0x40013000 - 0x40000000)*32 + 7*4)) = 0; // SPI1_CR1.LSBFIRST p.746
*((volatile long *)(0x42000000 + (0x40013000 - 0x40000000)*32 + 5*4)) = 1; // SPI1_CR1.BR[2] \
*((volatile long *)(0x42000000 + (0x40013000 - 0x40000000)*32 + 4*4)) = 1; // SPI1_CR1.BR[1] |--- 111 means FPCLK/256 p.746
*((volatile long *)(0x42000000 + (0x40013000 - 0x40000000)*32 + 3*4)) = 1; // SPI1_CR1.BR[0] /
*((volatile long *)(0x42000000 + (0x40013000 - 0x40000000)*32 + 2*4)) = 1; // SPI1_CR1.MSTR p.747
*((volatile long *)(0x42000000 + (0x40013000 - 0x40000000)*32 + 1*4)) = 0; // SPI1_CR1.CPOL p.747
*((volatile long *)(0x42000000 + (0x40013000 - 0x40000000)*32 + 0*4)) = 0; // SPI1_CR1.CPHA p.747
*((volatile long *)(0x42000000 + (0x40013000 - 0x40000000)*32 + 6*4)) = 1; // SPI1_CR1.SPE p.746
}

 

The problem is, using a SALEAE logic analyzer, SCLK does not oscillate. I assume the labels out to the right are self-explanatory as far as what I am trying to do with each register access. What am I missing? Thanks in advance!

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