I collect the ADC data through the I2S1 peripheral using DMA2
1) i collected certain amount of results,
2) the reception is paused with:
3) I send the data through UART
4) then the reception is resumed with:
then this mechanism can be started again from point 1).
What i observed is that somehow (not always, but ~8/10 times) the L and R channels have been swapped. I attached a figure of the results.
(I inferred on the swapping based on that the ADC sends ch1 and ch2 results one after another, and the voltage on ch1 is approximately 10 times bigger then on ch2)
Is there anyone who could give me a tip what is the problem?
Thank you very much in advance.