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SPI BSY erratum listed under I2C in 'F76x/77x errata

Question asked by waclawek.jan on Feb 7, 2017

In STM32F76xxx and STM32F77xxx silicon limitations DocID028806 Rev 4, 2.2.2  BSY bit may stay high at the end of a data transfer in slave mode which is entirely an SPI error, is listed under I2C peripheral limitations.

 

JW

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