I'm struggling with the DMA stream reenabling. I'm using 6 DMA streams to transfer known amount of data from memory to periph. Streams are triggerd with two PWM timers in the master-slave mode (update and CC trigers).
When transfer starts for the first time, everything works fine, but for each subsequent transfer I receive FIFO error interrupt flag, although DMA is configured in direct mode.
Pictures from the left side:
1. Before the first DMA transfer
2. After first (successful) transfer, all relevant DMA flags cleared and data counter set again
3. Immediately after DMA_Cmd(DMA2_StreamX, ENABLE); for every stream
4. Timers before (and after) enabling dma stream for the second transfer
Please notice that NDTR has been decremented for 1 (only 1) immediately after enabling DMA stream although timers are disabled and all flags cleared, therefor there should be no triggering.
After enabling timers the rest 17 half-words are transferred correctly...
Can someone help me with this?