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ADC and DMA issues

Question asked by _kerbladh.Ola on Jan 20, 2017
Latest reply on May 6, 2017 by David Martins

Hi all,

 

I’m using stm32cube mx to set up a project for my STM32L4 discovery board. Please note that I’ve removed a component and have patched pins PC0, PC1 and PC2 to analog voltages for sampling. I’m using MCO signal (8MHz) from the ST-LINK MCU STM32F103CBT6 to drive my PLL generating an 80MHz clock.  

 

I’m using an external pin (EXTI11) to start conversions on all ADCs. The idea is to transfer the data to memory with DMA and then transfer data to the SPI output buffer. Data must be sent in a specific order so I ruled out DMA directly to the SPI_TX buffer from ADC. Currently my EXTI11 interrupts come at 48 kHz, it is possible to scale down to 24 kHz if needed. When enabling the ADC EOC interrupts I see that I get them in correct order (tested with debug pins). See linked picture 1.

 

From positive edge on EXTI11 to EOC I get

-ADC1_CH1 – about 1.5 us

-ADC2_CH2 – about 2 us

-ADC3_CH3 – about 5-6  us

 

Q1:  From what I could gather in the reference manual, the ADCs should be done in under 1 us. Also. why is ADC3 (channel 3) so much slower than ADC1_CH1, ADC2_CH2? (ADC3_CH3 should be a fast channel)

 

When enabling DMA (to mem /circular / half word / non incrementing ) I only get an Full Transfer interrupt  every third or fourth positive edge on EXTI11 (PE11). See linked picture 2 below.  

 

Q2: Why???

 

I’ve attached the complete project as zip (with cube mx project and all) 

https://dl.dropboxusercontent.com/u/69439382/stm32/adc_test20170120.zip

 

Pic1 – yellow is external irq, the other three are test pins that I toggle in each channels EOC. Lower one is ADC3_CH3 https://dl.dropboxusercontent.com/u/69439382/stm32/adc eoc irq.jpg

 

Pic2 – yellow is external irq, the other three are test pins that I toggle in DMA Transfer Complete interrupt.  https://dl.dropboxusercontent.com/u/69439382/stm32/dma irq.jpg

 

Any ideas and suggestions are welcome!  Best regards, Ola Åkerbladh

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