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STM32F746 Quad SPI in Legacy mode

Question asked by Eugene Solo on Jan 18, 2017
Latest reply on Mar 12, 2017 by Eugene Solo

I'm working on project involving STM32F746 in QFP208 package.

 

Reference manual states that in Legacy SPI mode (which may be used for compatibility purposes) pins are configured as:

IO2 is in output mode and forced to ‘0’ (to deactivate the “write protect” function)
IO3 is in output mode and forced to ‘1’ (to deactivate the “hold” function)

But WRITE_PROTECT function on all chips I know (on test board will be SST25VF032B, final version will use W25Q128FV) is in negative logic, so to deactivate it we need to force '1' state on this lane, and not '0'. Am I wrong with my understanding of this situation?

 

And another question: I'lm planning to use pins PF6,7,8,9 for QUADSPI_BK1_IOx bus.

But here https://community.st.com/message/91728?q=quad%20spi  I see that someone experienced problems with it.And I see advice "QUADSPI_BK1_IO2 should be used for PE2 pin". But why? Errata says nothing about this specific pin, so my question is: is it safe to use this pinout?

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