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How to control CS  independently of SRAM R/W ?

Question asked by shalit.ran on Dec 21, 2016
Latest reply on Dec 22, 2016 by waclawek.jan

Hello,

We use LCD interface with SM32F4 , with ILITEK 9341.

According to LCD datasheet is it required that CS will be kept active throught several writings of data/control.

But We see that each write of 8-bit word results in changing the CS from IDLE to active and back to IDLE.

Maybe this can explain our failure to make LCD functional.

 

SRAM configuration:

LCD interface

chip select NE3.

LCD register select: A0

DATA: 8-bit

 

What can we do to control CS?

I also see the LCD example with STM32F4 demo, which seems to use SSD2119,

and I see that it also make separate write for command and data, so I wander how it works in EVM.

/**
* @brief Writes to the selected LCD register.
* @param LCD_Reg: address of the selected register.
* @param LCD_RegValue: value to write to the selected register.
* @retval None
*/
void LCD_WriteReg(uint8_t LCD_Reg, uint16_t LCD_RegValue)
{
/* Write 16-bit Index, then Write Reg */
LCD_CMD = LCD_Reg;
/* Write 16-bit Reg */
LCD_Data = LCD_RegValue;
}

Thank you!

Ran

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