Sorry for my English.
specified in the datasheet
If a slave receiver does not acknowledge the slave address (i.e. it is not able to receive because it is performing some real-time function) the data line must be kept HIGH by the slave. The master can then abort the transfer. A LOW to HIGH transition on the SDA line while the SCL line is HIGH is defined as a STOP condition. Each data transfer must be terminated by the generation of a STOP (SP) condition.
Sensor sets the data line in high. The microcontroller by sending an address sensor receives NACK, and stops communication.
After that, registers AV_CONF, CTRL _REG1, CTRL _REG2, CTRL_REG3 reset to its default state (All read operations read the default values).
This situation occurs if the ODR> 0. (1 Hz 7 Hz 12,5 Hz)
Why is this happening?
How do I check the conversion is complete without RDY pin (ODR>0)?
Best regards, Sergey