Dear Community members,
I'm developing a device which is based on a "Master - Slave" communication architecture, but now I encountered with a data loss while the Slave is receiving. Since the case is occasional, I still have no idea after I read a few times of related documents, the application and the detail implementation procedures are listed below:
the "Master - Slave" communication is formed by SPI with DMA, 15MHz.
The MCU is STM32F207.
the "master - slave application" functionality:
master should continuously issue the request to the slave, slave will reply the requisite data to the master through SPI.
However, after communicate for a while, slave may not receive the last data issued by the master, confirmed that the last data has been sent by master and also could be observed on the oscilloscope. Since the Master should issue each request after receiving the "HW ACK signal" from Slave, Slave should issue each "HW ACK signal" after the next DMA receiving is ready, it is very hard to find the reason that Slave ignores the receiving of the last data from Master.
The case above I'm sure that Slave did not receive the last data from Master since I could not find the related data in the configured DMA memory buffer and the more certain point is that the register "SxNDTR" remains as the configured value but "zero", so I judge that Slave doesn't receive anything from DMA for the last data issued by Master.
Since the system is also integrated with USB MSC, if I turn off the USB MSC features, it can just work fine, I could not sort thing out, please suggest if you have any idea, any of it might be a great help for me.
the related code is attached, if there is any thing required please let me know.
Many thanks for all the suggestions,