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Dubious update of TIM8_DMAR

Question asked by kleier.hermann on Nov 26, 2016
When debugging an application I wondered about a strange value in TIM8_DMAR that I had not written there intentionally. In the end it all boiled down to an invocation of LL_TIM_SetCounterMode (TIM8, LL_TIM_COUNTERMODE_DOWN):

01.822     LL_TIM_SetCounterMode  (TIM8, LL_TIM_COUNTERMODE_DOWN);
02.(gdb) s
03.LL_TIM_SetCounterMode (TIMx=0x40013400, CounterMode=16) at /home/h/STM32Cube/Repository/STM32Cube_FW_L4_V1.5.2/Drivers/STM32L4xx_HAL_Driver/Inc/stm32l4xx_ll_tim.h:1467
04.1467      MODIFY_REG(TIMx->CR1, TIM_CR1_DIR | TIM_CR1_CMS, CounterMode);
05.(gdb) p/x &TIMx->CR1
06.$27 = 0x40013400
07.(gdb) p/x TIMx->CR1
08.$28 = 0x0
09.(gdb) p/x &TIMx->DMAR
10.$29 = 0x4001344c
11.(gdb) p/x TIMx->DMAR
12.$30 = 0x0
13.(gdb) s
14.1468    }
15.(gdb) p/x TIMx->CR1
16.$31 = 0x10
17.(gdb) p/x TIMx->DMAR
18.$32 = 0x10

After stepping into (line 2) I checked addresses and contents of the peripheral registers TIM8_CR1 and TIM8_DMAR (lines 5 to 12). Everything behaved as expected. No bad defined structures and the contents were still at their reset values. However, the next step (line 13) changed TIM8_DMAR to the same value as TIM8_CR1 (line 18). I checked the definition of MODIFY_REG, but it was reasonable:

1.#define WRITE_REG(REG, VAL)   ((REG) = (VAL))
2.#define READ_REG(REG)         ((REG))

What is happening here?