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PLL_Q for USB

Question asked by shingadaddy on Nov 18, 2016
Latest reply on Dec 2, 2016 by shingadaddy
STM32L476RG on Nucleo - Porting over the example from EVAL board with 8Mhz Crystal
STM32CubeL4 - HAL demo.

If using the HSE with an input source of 8Mhz supplied by STlink,
1. I believe I need to set HSEBYP = 1 for EXTERNAL CLOCK instead of EXTERNAL CRYSTAL. Right?
2. Shouldn't the PLL_Q setting be 6?   (6 x 8000000 = 48 MHZ) HAL demo for EVAL and PLL has setting of 4 while the schematic shows again, an 8 MHZ crystal..

/* Select PLLSAI output as USB clock source */
  PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
  PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_PLLSAI1;
  PeriphClkInitStruct.PLLSAI1.PLLSAI1N = 24;
  PeriphClkInitStruct.PLLSAI1.PLLSAI1Q = 4; // ?????????
  P
eriphClkInitStruct.PLLSAI1.PLLSAI1P = 1;
  PeriphClkInitStruct.PLLSAI1.PLLSAI1M = 1;
  PeriphClkInitStruct.PLLSAI1.PLLSAI1Source = RCC_PLLSOURCE_HSE;
  PeriphClkInitStruct.PLLSAI1.PLLSAI1ClockOut= RCC_PLLSAI1_48M2CLK;

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