AnsweredAssumed Answered

STM32F7(65) FMC NAND DCache issue

Question asked by peckham.ed on Oct 27, 2016
Latest reply on Oct 27, 2016 by waclawek.jan
I have a NAND flash connected to the FMC on my STM32F765VGT6 and using the HAL drivers (September 2016). I have noticed inconsistent behaviour when the DCache is enabled when polling the flash during HAL_NAND_Read_Status or reading the HAL_NAND_Read_ID.

Behaviours include:

* Bad data read back from the HAL_NAND_Read_ID
* Incorrect status values read from HAL_NAND_Read_Status

while prevent the flash from working.

When I disable the DCache, everything works fine.

The __DSB() calls are made after each IO read and write in the HAL drivers. I have tried also to clean the DCache after read and write operations, but the only working solution is to disable the DCache.

Has anybody got any suggestions to make this work with the DCache enabled? Let me know if you need more info.

Thanks,
Ed

Outcomes