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STM32F429 I2C not generating interrupts

Question asked by peeters.bram on Oct 25, 2016
Latest reply on Nov 2, 2016 by Nesrine M
Hi,

I am trying to get interrupt based I2C functionality running on the STM32F429, eg using the HAL_I2C_Mem_Write_IT function.

However the EVT interrupt that should occur to get the process rolling is never called.
The code is based on CubeMX generated code (dated 22-September-2016)

So far I checked the following things:
* stm32f4xx_hal_msp.c enables the interrupts in the NVIC using the following code:
HAL_NVIC_SetPriority(I2C3_EV_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(I2C3_EV_IRQn);
HAL_NVIC_SetPriority(I2C3_ER_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(I2C3_ER_IRQn);

which ultimately  sets (did not check if these are the right flags as ISER registers apparently are not documented in the RM0090 reference manual (?))
NVIC->ISER2 = NVIC->ISER2 | 0x00000300
NVIC->ICER2 = NVIC->ICER2 | 0x00000300
NVIC->IPR18 = NVIC->IPR18 | 0x00005050

* The actual "setup" work is done in the stm32f4xx_hal.i2c.c file with the following code (cfr
HAL_I2C_Mem_Write_IT ):

    /* Generate Start */
    hi2c->Instance->CR1 |= I2C_CR1_START;

      /* Process Unlocked */
      __HAL_UNLOCK(hi2c);

      /* Note : The I2C interrupts must be enabled after unlocking current process
      to avoid the risk of I2C interrupt handle execution before current
      process unlock */

      /* Enable EVT, BUF and ERR interrupt */
      __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);

I can see that the start condition is generated on the bus with the scope, the flag is also set in SR1, and the interrupts are indeed enabled in CR2 with the last call, but unfortunately no interrupt routine is being called.
I already tried reversing the order to first enable the interrupts and then generate the start bit thinking that maybe the interrupts are of the edge kind io level kind (not much documentation about this at all) but no luck.

Other things I can do/check, because i am starting to run out of ideas ?

Note: using the regular non interrupt version "works" but that code is thread unsafe

Thanks
Bram

EDIT: I also see that when  __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR); is executed, then NVIC->ISPR2 and ICPR2 become 0x00000100, so the interrupts definitely reach the NVIC block ( I have found PM0214 in the meantime which describes the M4 core). So somehow i end up with pending interrupts that are enabled but that are not becoming active ... ?
My vector table (startup_stm32f429xx.s) contains entries for these interrupts:
        DCD     I2C3_EV_IRQHandler                ; I2C3 event
        DCD     I2C3_ER_IRQHandler                ; I2C3 error
So still no idea what is wrong

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