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Teach me STM32F4, DCMI interface, when DCMI data is saved at the external SRAM.

Question asked by lee.zippy.001 on Oct 24, 2016
Latest reply on Oct 24, 2016 by waclawek.jan

There’s a problem when DCMI data is saved at the external SRAM.

Camera Module uses mt9m112 and SRAM uses 61WV51216BLL.

The read/write test of Sram works properly. 

It works normally when DCMI data is saved at internal STM32F4.

There’s only a problem when DCMI data is saved at external SRAM.

ex) The data saved at SRAM : The data of even number (including0) is normal but at the data of odd number MSB and LSB is turned over. 

[0] 0x1CDF
[1] 0xDF1C
[2] 0X3CDF
[3] 0xE73C
[4] 0x3CE7
[5] 0xE73C
[6] 0x3CE7
[7] 0xE73C
...

attached my source code

//==================================================================

 

/* DCMI GPIO configuration **************************************************/

 

/* PIXCLK(PA6) HSYNC(PA4)*/

 

       GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4 | GPIO_Pin_6;

 

       GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;

 

       GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;

 

       GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;

 

       GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;

 

       GPIO_Init(GPIOA, &GPIO_InitStructure);

 

/* VSYNC(PB7) */

 

       GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7 ;

 

       GPIO_Init(GPIOB, &GPIO_InitStructure);

 

/* D0 D1 D2 D3(PC6/7/8/9), D4(PC11) */

 

       GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6 | GPIO_Pin_7| GPIO_Pin_8|GPIO_Pin_9| GPIO_Pin_11;

 

       GPIO_Init(GPIOC, &GPIO_InitStructure);

 

/* D5(PB6) D6(PB8) D7(PB9) */

 

       GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6| GPIO_Pin_8| GPIO_Pin_9;

 

       GPIO_Init(GPIOB, &GPIO_InitStructure);

 

       

 

//===================================================================

 

// DCMI_RST pin

 

       GPIO_InitStructure.GPIO_Pin = GPIO_DCMI_RST_PIN;

 

       GPIO_InitStructure.GPIO_Speed =GPIO_Speed_50MHz;

 

       GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT;

 

       GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;

 

       GPIO_Init(GPIOA, &GPIO_InitStructure);

 

          

 

 

 

/* DCMI configuration*******************************************************/

 

       DCMI_InitStructure.DCMI_CaptureMode = DCMI_CaptureMode_SnapShot;

 

       DCMI_InitStructure.DCMI_SynchroMode = DCMI_SynchroMode_Hardware; //Hardware: Hardware synchronization data capture is synchronized with theHSYNC/VSYNC signals.

 

                                                                                                 // Embedded: Embedded synchronization data capture is synchronized withsynchronization codes embedded in the data flow.

 

       DCMI_InitStructure.DCMI_PCKPolarity = DCMI_PCKPolarity_Falling;  //Pixel clock polarity

 

#ifdef FEATURE_MT9M112

 

       DCMI_InitStructure.DCMI_VSPolarity = DCMI_VSPolarity_Low;  // Vertical synchronization polarity

 

        DCMI_InitStructure.DCMI_HSPolarity =DCMI_HSPolarity_Low; // Horizontal synchronization polarity

 

#endif

 

#ifdef FEATURE_OV7670

 

       DCMI_InitStructure.DCMI_VSPolarity = DCMI_VSPolarity_High;

 

       DCMI_InitStructure.DCMI_HSPolarity = DCMI_HSPolarity_High;

 

#endif

 

       DCMI_InitStructure.DCMI_CaptureRate = DCMI_CaptureRate_All_Frame;

 

       DCMI_InitStructure.DCMI_ExtendedDataMode = DCMI_ExtendedDataMode_8b;

 

       DCMI_Init(&DCMI_InitStructure);

 

 

 

/* Configures the DMA2 to transfer Datafrom DCMI to the SRAM ****************/

 

       DMA_DeInit(DMA2_Stream1);

 

 

 

       while (DMA_GetCmdStatus(DMA2_Stream1) != DISABLE);

 

 

 

       DMA_InitStructure.DMA_Channel = DMA_Channel_1;

 

       DMA_InitStructure.DMA_PeripheralBaseAddr = DCMI_DR_ADDRESS;

 

        DMA_InitStructure.DMA_Memory0BaseAddr =(u32)FSMC_IMAGE_ADDRESS;

 

       DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory;

 

       DMA_InitStructure.DMA_BufferSize = 38400;

 

       DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;

 

       DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;

 

       DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word;

 

       DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;

 

       DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;

 

       DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;

 

       DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Enable;

 

       DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_Full;

 

       DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;

 

       DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;

 

       DMA_Init(DMA2_Stream1, &DMA_InitStructure);

 

 

 

#ifdef BMP_VGA

 

       DMA_DoubleBufferModeConfig(DMA2_Stream1, FSMC_IMAGE_ADDRESS + (38400*4),DMA_Memory_0);

 

       DMA_DoubleBufferModeCmd(DMA2_Stream1, ENABLE);

 

#endif

 

 

 

       DMA_Init(DMA2_Stream1, &DMA_InitStructure);

 

 

 

       /* Enable the DMA global Interrupt */

 

       NVIC_InitStructure.NVIC_IRQChannel = DMA2_Stream1_IRQn;

 

       NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 5;

 

       NVIC_InitStructure.NVIC_IRQChannelSubPriority = 2;

 

       NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;

 

       NVIC_Init(&NVIC_InitStructure);

 

 

 

//       DMA_ITConfig(DMA2_Stream1, DMA_IT_HT, ENABLE); // half transferinterrupt

 

       /* Enable DMA Transfer Complete interrupt */

 

       DMA_ITConfig(DMA2_Stream1, DMA_IT_TC, ENABLE);

 

================ SRAM ====================

 

/*-- GPIOs Configuration -----------------------------------------------------*/

 

       /*

 

        +-------------------+--------------------+------------------+------------------+

 

        | PD0  <-> FSMC_D2  | PE0 <-> FSMC_NBL0 | PF0 <-> FSMC_A0  | PG0 <-> FSMC_A10 |

 

        | PD1  <-> FSMC_D3  | PE1 <-> FSMC_NBL1 | PF1 <-> FSMC_A1  | PG1 <-> FSMC_A11 |

 

        | PD4  <-> FSMC_NOE |PE7  <-> FSMC_D4  | PF2 <-> FSMC_A2  | PG2 <-> FSMC_A12 |

 

        | PD5  <-> FSMC_NWE|PE8  <-> FSMC_D5   | PF3 <-> FSMC_A3  | PG3 <-> FSMC_A13 |

 

        | PD8  <-> FSMC_D13 |PE9  <-> FSMC_D6  | PF4 <-> FSMC_A4  | PG4 <-> FSMC_A14 |

 

        | PD9  <-> FSMC_D14 | PE10<-> FSMC_D7  | PF5 <->FSMC_A5  | PG5 <-> FSMC_A15 |

 

        | PD10 <-> FSMC_D15 |PE11 <-> FSMC_D8   | PF12 <-> FSMC_A6 | PG9 <->FSMC_NE2 |

 

        | PD11 <-> FSMC_A16 | PE12 <-> FSMC_D9   | PF13 <-> FSMC_A7|------------------+

 

        | PD12 <-> FSMC_A17 | PE13 <-> FSMC_D10   | PF14 <-> FSMC_A8 |

 

        | PD13 <-> FSMC_A18 | PE14 <-> FSMC_D11   | PF15 <-> FSMC_A9 |

 

        | PD14 <-> FSMC_D0  | PE15 <-> FSMC_D12   |------------------+

 

        | PD15 <-> FSMC_D1 +--------------------+  

 

        +------------------+

 

                                       

 

       */

 

       /* GPIOD configuration */

 

       GPIO_PinAFConfig(GPIOD, GPIO_PinSource0, GPIO_AF_FSMC);   // FSMC_D2

 

       GPIO_PinAFConfig(GPIOD, GPIO_PinSource1, GPIO_AF_FSMC);   // FSMC_D3

 

       GPIO_PinAFConfig(GPIOD, GPIO_PinSource4, GPIO_AF_FSMC);   // FSMC_NOE

 

       GPIO_PinAFConfig(GPIOD, GPIO_PinSource5, GPIO_AF_FSMC);   // FSMC_NWE

 

       GPIO_PinAFConfig(GPIOD, GPIO_PinSource8, GPIO_AF_FSMC);   // FSMC_D13

 

       GPIO_PinAFConfig(GPIOD, GPIO_PinSource9, GPIO_AF_FSMC);   // FSMC_D14

 

       GPIO_PinAFConfig(GPIOD, GPIO_PinSource10, GPIO_AF_FSMC);  // FSMC_D15

 

       GPIO_PinAFConfig(GPIOD, GPIO_PinSource11, GPIO_AF_FSMC);  // FSMC_A16

 

       GPIO_PinAFConfig(GPIOD, GPIO_PinSource12, GPIO_AF_FSMC);  // FSMC_A17

 

       GPIO_PinAFConfig(GPIOD, GPIO_PinSource13, GPIO_AF_FSMC);  // FSMC_A18

 

       GPIO_PinAFConfig(GPIOD, GPIO_PinSource14, GPIO_AF_FSMC);  // FSMC_D0

 

       GPIO_PinAFConfig(GPIOD, GPIO_PinSource15, GPIO_AF_FSMC);  // FSMC_D1

 

       

 

       GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1  | GPIO_Pin_4  | GPIO_Pin_5 |

 

                               GPIO_Pin_8  | GPIO_Pin_9 | GPIO_Pin_10 | GPIO_Pin_11 |

 

                                GPIO_Pin_12 |GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15;

 

       GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;

 

       GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;

 

       GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;

 

       GPIO_InitStructure.GPIO_PuPd  =GPIO_PuPd_NOPULL;

 

 

 

       GPIO_Init(GPIOD, &GPIO_InitStructure);

 

       

 

       

 

       /* GPIOE configuration */

 

       GPIO_PinAFConfig(GPIOE, GPIO_PinSource0 , GPIO_AF_FSMC);    // FSMC_NBL0

 

       GPIO_PinAFConfig(GPIOE, GPIO_PinSource1 , GPIO_AF_FSMC);    // FSMC_NBL1

 

       GPIO_PinAFConfig(GPIOE, GPIO_PinSource7 , GPIO_AF_FSMC);   // FSMC_D4

 

       GPIO_PinAFConfig(GPIOE, GPIO_PinSource8 , GPIO_AF_FSMC);   // FSMC_D5

 

       GPIO_PinAFConfig(GPIOE, GPIO_PinSource9 , GPIO_AF_FSMC);   // FSMC_D6

 

       GPIO_PinAFConfig(GPIOE, GPIO_PinSource10 , GPIO_AF_FSMC);  // FSMC_D7

 

       GPIO_PinAFConfig(GPIOE, GPIO_PinSource11 , GPIO_AF_FSMC);  // FSMC_D8

 

       GPIO_PinAFConfig(GPIOE, GPIO_PinSource12 , GPIO_AF_FSMC);  // FSMC_D9

 

       GPIO_PinAFConfig(GPIOE, GPIO_PinSource13 , GPIO_AF_FSMC);  // FSMC_D10

 

       GPIO_PinAFConfig(GPIOE, GPIO_PinSource14 , GPIO_AF_FSMC);  // FSMC_D11

 

       GPIO_PinAFConfig(GPIOE, GPIO_PinSource15 , GPIO_AF_FSMC);  // FSMC_D12

 

       

 

       GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_7 |

 

                                GPIO_Pin_8 |GPIO_Pin_9 | GPIO_Pin_10| GPIO_Pin_11|

 

                                GPIO_Pin_12|GPIO_Pin_13| GPIO_Pin_14| GPIO_Pin_15;

 

 

 

       GPIO_Init(GPIOE, &GPIO_InitStructure);

 

       

 

       

 

       /* GPIOF configuration */

 

       GPIO_PinAFConfig(GPIOF, GPIO_PinSource0 , GPIO_AF_FSMC);   // FSMC_A0

 

       GPIO_PinAFConfig(GPIOF, GPIO_PinSource1 , GPIO_AF_FSMC);   // FSMC_A1

 

       GPIO_PinAFConfig(GPIOF, GPIO_PinSource2 , GPIO_AF_FSMC);   // FSMC_A2

 

       GPIO_PinAFConfig(GPIOF, GPIO_PinSource3 , GPIO_AF_FSMC);   // FSMC_A3

 

       GPIO_PinAFConfig(GPIOF, GPIO_PinSource4 , GPIO_AF_FSMC);   // FSMC_A4

 

       GPIO_PinAFConfig(GPIOF, GPIO_PinSource5 , GPIO_AF_FSMC);   // FSMC_A5

 

       GPIO_PinAFConfig(GPIOF, GPIO_PinSource12 , GPIO_AF_FSMC);  // FSMC_A6

 

       GPIO_PinAFConfig(GPIOF, GPIO_PinSource13 , GPIO_AF_FSMC);  // FSMC_A7

 

       GPIO_PinAFConfig(GPIOF, GPIO_PinSource14 , GPIO_AF_FSMC);  // FSMC_A8

 

       GPIO_PinAFConfig(GPIOF, GPIO_PinSource15 , GPIO_AF_FSMC);  // FSMC_A9

 

 

 

       GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1  | GPIO_Pin_2  | GPIO_Pin_3 |

 

                                GPIO_Pin_4  | GPIO_Pin_5 | GPIO_Pin_12 | GPIO_Pin_13 |

 

                                GPIO_Pin_14 |GPIO_Pin_15;     

 

 

 

       GPIO_Init(GPIOF, &GPIO_InitStructure);

 

       

 

       

 

        /* GPIOG configuration */

 

       GPIO_PinAFConfig(GPIOG, GPIO_PinSource0 , GPIO_AF_FSMC);  // FSMC_A10

 

       GPIO_PinAFConfig(GPIOG, GPIO_PinSource1 , GPIO_AF_FSMC); // FSMC_A11

 

       GPIO_PinAFConfig(GPIOG, GPIO_PinSource2 , GPIO_AF_FSMC); // FSMC_A12

 

       GPIO_PinAFConfig(GPIOG, GPIO_PinSource3 , GPIO_AF_FSMC); // FSMC_A13

 

       GPIO_PinAFConfig(GPIOG, GPIO_PinSource4 , GPIO_AF_FSMC); // FSMC_A14

 

       GPIO_PinAFConfig(GPIOG, GPIO_PinSource5 , GPIO_AF_FSMC); // FSMC_A15

 

       GPIO_PinAFConfig(GPIOG, GPIO_PinSource9 , GPIO_AF_FSMC);  // FSMC_NE2

 

 

 

       GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1  | GPIO_Pin_2  | GPIO_Pin_3 |

 

                                GPIO_Pin_4  | GPIO_Pin_5 |GPIO_Pin_9;     

 

 

 

       GPIO_Init(GPIOG, &GPIO_InitStructure);

 

       

 

       /* FSMC Configuration */

 

       p.FSMC_AddressSetupTime = 0; // 1

 

       p.FSMC_AddressHoldTime = 0;

 

       p.FSMC_DataSetupTime = 3;   // 6

 

       p.FSMC_BusTurnAroundDuration = 0;

 

       p.FSMC_CLKDivision = 0;

 

       p.FSMC_DataLatency = 0;

 

       p.FSMC_AccessMode = FSMC_AccessMode_A;

 

 

 

       FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM2;

 

       FSMC_NORSRAMInitStructure.FSMC_DataAddressMux =FSMC_DataAddressMux_Disable;

 

       FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM;

 

       FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth =FSMC_MemoryDataWidth_16b;

 

       FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode =FSMC_BurstAccessMode_Disable;

 

       FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait =FSMC_AsynchronousWait_Disable; 

 

       FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity =FSMC_WaitSignalPolarity_Low;

 

       FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;

 

       FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive =FSMC_WaitSignalActive_BeforeWaitState;

 

       FSMC_NORSRAMInitStructure.FSMC_WriteOperation =FSMC_WriteOperation_Enable;

 

       FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;

 

       FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;

 

       FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;

 

       FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;

 

       FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;

 

       

 

 

 

       FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);

 

 

 

       /* Enable FSMC Bank1_SRAM2 Bank */

 

       FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM2, ENABLE);


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