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Handling ECCD error during flash read on stm32l4

Question asked by cc.mm on Oct 9, 2016
Latest reply on Aug 23, 2017 by Lukasz Nowak
Hello,

I'm building an application with ST STM32L4 that stores information on internal flash (ECC flash on L4). The information is valuable, so the flash programming must be robust to unexpected shut downs including ones caused by an external watchdog (that may reset the MCU unexpectedly at any point in time).

In the reference manual RM0351 chapter 3.3.2 it is written that when ECCD error is detected an NMI is generated by the flash peripheral. What is the proper way to handle such interrupt when ECCD error was detected during reading of a faulty double-word?

This problem occurs when the MCU is being reset while the flash peripheral is in the middle of programming a double-word (so the ECC has not been written yet therefore it's incompatible with the double-word that was being written).

There is no reference of handling such a problem on ST's HAL code or in the reference manual.

Thanks,
MC.

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