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Problem in six-step PWM generatioin

Question asked by David_Lin on Aug 23, 2016
Latest reply on Aug 25, 2016 by David_Lin
I am using STM32F3 Discovery board to generate six-step PWM signals for BLDC motor drive. The switching was done in SysTick ISR by generating a SW COMG event. When I checked the PWM output on oscilloscope, however, I noticed that the very first PWM pulse generated was always much wider than the duty cycle I set, as shown in the picture attached.

I attached the code I used and would anyone please help to check why the wide first pulse could happen?