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I²C Level Shifting Required for STM32L4?

Question asked by kleier.hermann on Aug 10, 2016
Latest reply on Aug 31, 2016 by Bertrand Denis
I operate an STM32L4 at 1.8 V and I²C peripherals at (up to) 3.6 V. The data sheet (DocID028794 Rev 2, table 21) is pretty clear when it comes to FT_xx inputs. But when it comes to FT_xx outputs I trip over the following statement:

The SDA and SCL I/O requirements are met with the following restrictions: the SDA and SCL I/O pins are not “true”
open-drain. When configured as open-drain, the PMOS connected between the I/O pin and V_DDIOx is disabled, but is still
present.


What can I make of it? Does the (deactivated!) PMOS sink current from the 3.6 V I²C line to the 1.8 V V_DD-supply  because the MCU cannot drive its gate higher than V_DD? Where is the reference in the data sheet telling me that an open-drain output (FT_xx of course) can be raised above V_DD?

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