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How is USART tolerance to clock deviation related to fractional baud-rate?

Question asked by Koscheck.David on Jul 28, 2016
Latest reply on Jul 28, 2016 by Koscheck.David

Hello all, STM32F1xx ref. manual (RM0041) states different USART receiver tolerances to clock deviation depending on whether DIV_Fraction is zero or not (see attachment).

Could someone please explain to me why fractional baud-rate is influencing clock-deviation tolerances?