We are developing a display using STM32F439NIH6 Microcontroller in our design. We have the following technical queries:
We have referred to your evaluation board design and we are interfacing STM32F439NIH6 with SDRAM, NVRAM and ARINC 429 devices through FMC data bus and Address bus.
Can we connect all 3 loads and access simultaneously.
We are unable to drive all the three loads. During the process of analysis we came across I/O Cell Compensation in Reference Manual.
Is this can be enabled for FMC?
We tried to enable I/O cell compensation by reducing the System Clock to 100 MHz/90 MHz and 50 MHz.
We are unable to enable the Cell Compensation. Please help us in this regard by providing the procedure to enable the same.