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ADC noise STM32F103RB

Question asked by john.john.002 on Jul 23, 2016
Latest reply on Jul 24, 2016 by baird.hal.001
What configuration parameters (clock freq, sampling clock count, etc.) can I tune in order to minimize ADC reading noise when sensing a relatively low speed signal? 

I am currently getting about 10 to 20 LSB difference in high to low reading, for constant DC input on Nucleo CubeMX Keil.

So far, I tried timer triggered DMA and polling modes. Will different modes affect noise performance?

How about sensing a large number of samples and calculate average? Is noise reduced by square root of sample number?

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