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STM32F4 Discovery and SSD2119 LCD driver with the LCD_35T example

Question asked by volpi.gabriele on Jun 10, 2016
Latest reply on Jun 14, 2016 by volpi.gabriele

I'm trying to loading the LCD_35T example on an STM32F4 Discovery connected to a 320x240 TFT LCD with the SSD2119 driver (connected like in the expansion board).

What I get is that I'm not able to write on all the pixels of the display. I suppose it is a problem of register initialization:

01.LCD_WriteReg(SSD2119_SLEEP_MODE_1_REG, 0x0001);
02.// Set initial power parameters.
03.LCD_WriteReg(SSD2119_PWR_CTRL_5_REG, 0x002B);
04.LCD_WriteReg(SSD2119_VCOM_OTP_1_REG, 0x0006);
05.// Start the oscillator.
06.LCD_WriteReg(SSD2119_OSC_START_REG, 0x0001);
07.// Set pixel format and basic display orientation (scanning direction).
08.LCD_WriteReg(SSD2119_OUTPUT_CTRL_REG, 0x72EF); //72-30EF
09.LCD_WriteReg(SSD2119_LCD_DRIVE_AC_CTRL_REG, 0x0600);
10.// Exit sleep mode.
11.LCD_WriteReg(SSD2119_SLEEP_MODE_1_REG, 0x0000);
12._delay_(5);
13.// Configure pixel color format and MCU interface parameters.
14.LCD_WriteReg(SSD2119_ENTRY_MODE_REG, ENTRY_MODE_DEFAULT);
15.// Set analog parameters
16.LCD_WriteReg(SSD2119_SLEEP_MODE_2_REG, 0x0999);
17.LCD_WriteReg(SSD2119_ANALOG_SET_REG, 0x3800);
18.// Enable the display
19.LCD_WriteReg(SSD2119_DISPLAY_CTRL_REG, 0x0033);
20.// Set VCIX2 voltage to 6.1V.
21.LCD_WriteReg(SSD2119_PWR_CTRL_2_REG, 0x0005);
22.// Configure gamma correction.
23.LCD_WriteReg(SSD2119_GAMMA_CTRL_1_REG, 0x0000);
24.LCD_WriteReg(SSD2119_GAMMA_CTRL_2_REG, 0x0303);
25.LCD_WriteReg(SSD2119_GAMMA_CTRL_3_REG, 0x0407);
26.LCD_WriteReg(SSD2119_GAMMA_CTRL_4_REG, 0x0301);
27.LCD_WriteReg(SSD2119_GAMMA_CTRL_5_REG, 0x0301);
28.LCD_WriteReg(SSD2119_GAMMA_CTRL_6_REG, 0x0403);
29.LCD_WriteReg(SSD2119_GAMMA_CTRL_7_REG, 0x0707);
30.LCD_WriteReg(SSD2119_GAMMA_CTRL_8_REG, 0x0400);
31.LCD_WriteReg(SSD2119_GAMMA_CTRL_9_REG, 0x0A00);
32.LCD_WriteReg(SSD2119_GAMMA_CTRL_10_REG, 0x1000);
33.// Configure Vlcd63 and VCOMl
34.LCD_WriteReg(SSD2119_PWR_CTRL_3_REG, 0x000A);
35.LCD_WriteReg(SSD2119_PWR_CTRL_4_REG, 0x2E00);
36.LCD_WriteReg(SSD2119_GATE_SCAN_START_REG, 0x0001); // Vertical offset
37.// Set the display size and ensure that the GRAM window is set to allow
38.// access to the full display buffer.
39.LCD_WriteReg(SSD2119_V_RAM_POS_REG, (LCD_PIXEL_HEIGHT-1) << 8);
40.LCD_WriteReg(SSD2119_H_RAM_START_REG, 0x0000);
41.LCD_WriteReg(SSD2119_H_RAM_END_REG, LCD_PIXEL_WIDTH-1);
42.//LCD_WriteReg(SSD2119_H_PORCH, 0x001D);
43.//LCD_WriteReg(SSD2119_V_PORCH, 0x0003);
44.//LCD_WriteReg(SSD2119_FW_START, 0x0000);
45.//LCD_WriteReg(SSD2119_FW_END, 0x00EF);
46.//LCD_WriteReg(SSD2119_SW_START, 0x0000);
47.//LCD_WriteReg(SSD2119_SW_END, 0x00EF);
48.LCD_WriteReg(SSD2119_X_RAM_ADDR_REG, 0x00);
49.LCD_WriteReg(SSD2119_Y_RAM_ADDR_REG, 0x00);
50.// clear the lcd
51.LCD_WriteReg(SSD2119_RAM_DATA_REG, 0x0000);

The strange thing is that if I configure the SSD2119_H_RAM_END_REG [0x46] to be between 0 and 255 the display becomes wider but the last 65 pixels (320-255) are overwritten in the first pixels, like in the first two images. If I configure the same register to be greater than 255 (up to 320) the display shows just the last 65 pixels leaving undefined the rest of the display area.

The two situations can be seen in the attached figures

Attachments

Outcomes