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DCMI DMA synchronization on STM32F7

Question asked by flanery.will on Jun 6, 2016
Latest reply on Jun 6, 2016 by karpavicius.linas
I have the STM32F746 Discovery board and my project works with the OV9655 camera.

I am trying to switch over to use the MT9V034 camera chip from Aptina/OnSemi, which outputs 8bit grayscale (really, it outputs 10bit, but I'm only using the top 8 bits).

The DCMI uses the DMA to copy the incoming pixels from the camera to the camera buffer, but it isn’t synchronized with the FrameValid signal.  In other words, the test pattern from the camera can be seen in the camera buffer, but it is scrolling and maybe skewed.  I did some calculations with the o’scope to verify that I’m receiving the correct number of lines (272) and pixels per line (480), and the data is showing up in the correct memory region (camera buffer); it’s just not consistent from frame to frame.  My understanding is that the DCMI should control the DMA synchronization based on hardware (Hsync and Vsync, and PixClk).  I have checked all the signal polarities.  DMA is configured as a circular buffer with 0x7F80 transactions (480*272)/4.

Any other ideas?