AnsweredAssumed Answered

HardFault at ORR instruction, what is happening?!?

Question asked by kuula.soren on Jun 2, 2016
Latest reply on Jun 2, 2016 by kuula.soren
I am trying to get STM32CubeMX + arm-gcc + Nucleo-073RZ to do things. It won't.
I can see in my debugger and lst file that
08000990 <SystemInit>:
  * @retval None
void SystemInit (void)
/*!< Set MSION bit */
  RCC->CR |= (uint32_t)0x00000100;
 8000990:     4b0f           ldr     r3, [pc, #60]     ; (80009d0 <SystemInit+0x40>)
 8000992:     681a           ldr     r2, [r3, #0]
 8000994:     f442 7280      orr.w     r2, r2, #256     ; 0x100
 8000998:     601a           str     r2, [r3, #0]

At 8000994 , the orr instruction, I get a HardFault. This surprises me! Shouldn't that instruction be supported on an L0 even if I possibly compiled for a fancier core?
How can a simple orr with an inline operand (no memory access) cause a hard fault, I don't get it..
Thanks for any input!
Regards, Soren