Is it possible to use baud rate divisor less than 1? i.e. 1/16 - USART_BRR = 0x01

I did not find any information about it in STM32F4 RFM.

I did not find any information about it in STM32F4 RFM.

Is it possible to use baud rate divisor less than 1? i.e. 1/16 - USART_BRR = 0x01

I did not find any information about it in STM32F4 RFM.

I did not find any information about it in STM32F4 RFM.

- I wrote wrong number it have to be 1/16. Oversampling8 = 0

But anyway. If my clock is. i.e. 10 MHz, then can I apply divisor 1/16? - to achieve 10mbps?

I.e. is the closer to HW equation is fclk/((uint16_t)divisor)? (OVER8 =0)

But I'm also confused how I can divide it by 0? There are no any restrictions in datasheet. - The divisor is a fixed-point rational number; the mantissa is to the left of the binary point, and the fraction is to the right of the binary point, in the form mmmmmmmmmmmm.ffff (when OVER8 = 0).

In other words, if you set the mantissa to 0 and the fraction to 1, i.e. 000000000000.0001, the clock is divided by 16 and then divided by 1/16, which cancel out to give you a baud rate equal to the clock.

You're correct in thinking that in effect this means that if you treat the BRR register's value as an integer, the baud rate is given by dividing the UART clock by the BRR value.

Bear in mind that the UART clock is not HCLK; it is APBxCLK, depending on which UART you're using. - Divide by one wouldbe the unity case. I suspect they use a downcounter.

The silicon implementation is a lot simpler than the dogs breakfast presented by the techical writer. So either someone didn't explain it well or used a cell library they really didn't understand the internals for. Ie inherited it where the designer said it does the *equivalent* to this by doing that.

Typically in 16x mode, BRR = APBxCLK / Baud