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STM32F031 SPI slave BSY flag occasionally does not reset

Question asked by Kok.Henk on May 9, 2016
Latest reply on Jun 17, 2016 by BG
In our project we have two boards communicating with eachother through SPI. A controller board based on an STM32F405 is SPI master over a sensor board for which we have two instances. One is based on an STM32F071, the other on an STM32F031. They share the same SPI slave code (apart from pin assignment and peripheral number), but only on the 031 we experience a problem.

Once every ~10000 transactions, the SPI peripheral will not reset the BSY bit, even though it is obvious that it should. I have conducted a number of experiments which leave me slightly baffled. I have observed/tried the following:

  • The slave receives the message exactly as it is intended. I have explicitely tested this with the last bit being 0, 1, the same as the last-but-one bit, and different from the last-but-one bit.
  • When it occurs, TXE is 1 and DMA is complete.
  • Slowing down SPI does not make a difference
  • Making the master clock extra bytes does not change the situation. In fact it gives me results that even baffle me more.
This picture shows a situation where the problem occurs. The DMA scheduled on the slave is all 0xAA except the last 7, which number down 0x61, 0x51, 0x41, etc. The master clocks five extra bytes. Instead of repeating the last one, it will dig further into history and repeat the 0x31, three bytes before the end of the DMA buffer.

(Image obviously does not show SPI/DMA status, but when the problem occurs the sensor board prints the status of TXE, BSY and DMA to a terminal and the controller board generates a trigger at the next transaction)
To summarize:
  • Happens on 031 but not on 071
  • TXE is 1, DMA is complete, BSY will not reset
  • No indication that an SCK pulse was missed

What is going on here?