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Stm32F7: When is it usefull to enable DCACHE?

Question asked by Uwe Bonnes on Apr 12, 2016
Latest reply on Apr 12, 2016 by FTITI.Walid
In my understanding, DTCM, SRAM1 and SRAM2 all offer single cycle access. This leads my to the conclusion, that enabling DCACHE in a situation where there is no slow external memory does not bring any advantage, but the disadvantage of possible cache incoherencies. Is my understanding right?