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RXNE irq generation

Question asked by ionut.fasola on Mar 29, 2016
Latest reply on Mar 29, 2016 by waclawek.jan
STM32f100

I think there is an error in the reference manual for st32f100xx

The start bit is confirmed (RXNE flag set, interrupt generated if RXNEIE=1)....

According to this RXNE interrupt occurs when the start bit is confirmed. 

But earlier it is written : 

When a character is received:
The RXNE bit is set. It indicates that the content of the shift register is transferred to the
RDR. In other words, data has been received and can be read (as well as its
associated error flags)

Meaning that RXNE interrupt occurs after the full reception of the byte (all 10/11 bits), i guess after the stop bit.

Practice confirmed that RXNE irq occurs when the data is ready to be read. 

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