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Auto reflow QC tests on STM32F215

Question asked by rocca.stephane on Mar 28, 2016
Latest reply on Apr 28, 2016 by rocca.stephane

I would like to share an idea here about a way to auto-test our boards (based on STM32F215 LQFP64) to prevents shorts in both contexts:
1. after reflow process as partial QC,
2. during the product life: after each startup to eventualy detect transitory shorts in relation with water on the board, bad usage etc...

The idea would be, using the internal clock, to test the initial state of each pin of the MCU, regarding its surrounding neighbours, to detect reflow bridges, shorts...
Our initial idea is to use this kind of schem for 3 surrounding pins:
- pinA: INPUT -> NO_PULL : GPIO_Read()
- pinB: INPUT -> PULLUP during few ms, then PULLDOWN for another few ms
- pinC: INPUT -> NO_PULL : GPIO_Read()

By reading state of pinA and pinC during pinB level changes, we probably can detect a lot of potential shorts, what do you think?

Exluding NRST and BOOT0 and BOOT1 to prevent bad behavior?

Just after the reflow and before (1.) a takaya process will first test for main shorts:
- on alimentation VDD, perhaps VBAT, NRST too?
- is it necessary to test VCAP1 and VCAP2 regarding surrounding pins (VDD and PB11 and PA13) with the takaya, or is it safe to activate a pullup or pulldown on the closest pin if a reflow bridge is formed?

Same question about PH0 and PH1 (OSC_IN and OSC_OUT), running on internal clock is it pertinent to activate pullup and down the time of this test?

Thanks in advance for your feedback on it!