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PVD enable latency - SOLVED

Question asked by liu.bill.003 on Mar 8, 2016
Latest reply on Mar 15, 2016 by FTITI.Walid
I am using the STM32L053 MCU on the Nucleo board. The MCU is powered by 1.8V during the test. If I add some delay after turnning on the PVD, then the PVDO bit returns 1, with no delay it returns 0.

I could not find how long it takes for the PVDO bit to become valid in the datasheet. Has anyone tested that?

Here is the initialise routine:
void PVD_Config(void)
{
  /*##-1- Enable Power Clock #################################################*/
  __PWR_CLK_ENABLE();
   
  /* Wait for internal VREF ready */
  while( 0 == __HAL_PWR_GET_FLAG( PWR_FLAG_VREFINTRDY ) );
   
  /*##-2- Configure the NVIC for PVD #########################################*/
  HAL_NVIC_SetPriority(PVD_IRQn, 0, 0);
  HAL_NVIC_EnableIRQ(PVD_IRQn);
   
  sConfigPVD.PVDLevel = PVD_THRESHOLD_1V9;
  sConfigPVD.Mode = PWR_MODE_IT_RISING_FALLING;
  HAL_PWR_PVDConfig(&sConfigPVD);
   
  /* Enable the PVD */
  HAL_PWR_EnablePVD();
   
  /* Add some delay here */
     
  if ( 0 == __HAL_PWR_GET_FLAG( PWR_FLAG_PVDO ) )
  {
    /* Do something */
  }
}

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